Principal Design Verification Engineer at indie – Aliso Viejo | Jobyssey

Imagine being part of a team that’s redefining the future of mobility—where your ideas don’t just sit in a lab but power next-generation technology. At indie, we are developing cutting-edge semiconductors, photonics, and radar sensors and systems for automotive, industrial, and adjacent markets. Our innovations are at the heart of advanced intelligent sensing and user experience applications, pushing the boundaries of what’s possible.

If you're passionate about groundbreaking technology and want to make a real impact alongside a fast-paced team that thrives on creativity and collaboration, we’d love to have you on board!

As a Principal Design Verification Engineer, you will be responsible for developing and executing comprehensive verification strategies for next-generation automotive camera video and vision processors. You will work collaboratively with cross-functional teams to drive verification from architecture through silicon bring-up and product validation.

Responsibilities

Develop test strategies to verify next-generation camera processors.
Develop and review block- and chip-level verification environments and test plans.
Work closely with design engineers to develop test benches and test plans that meet coverage goals.
Participate in selecting best-in-class third-party protocol verification IP.
Help enhance the overall DV methodology by analyzing third-party verification tools.
Debug simulation failures and collaborate with designers to identify root-cause issues.
Develop tests that help achieve functional safety goals to meet ISO 26262 compliance.
Work with the systems and software teams on emulation platforms.
Participate in the bring-up and debug of ASICs.
Provide support to the Product Engineering team to meet all product validation and qualification goals.

Minimum Qualifications

BSEE, BSCE, or BSCS.
7+ years of industry experience in design verification.
Experience with test planning, test bench architecture, and assertions.
Constrained random verification experience using SystemVerilog and UVM.
Experience with coverage-driven verification (code, functional, and assertion coverage).
Strong programming skills in C/C++ and scripting experience with Python, Tcl, and Perl.

indie Semiconductor and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.

We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Concerning agencies: indie Semiconductor does not accept unsolicited resumes and will not be responsible for fees related to such.

Principal Design Verification Engineer

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