Physical AI/World Model Hardware Engineer at CHINA TELECOM SINGAPORE INNOVATION RESEARCH INSTITUTE PTE. LTD. – Singapore | Jobyssey

Aboutthe job

【About the Role】

Join our pioneering team to redefine the future of edge deploymentfor advanced AI models such as physical AI and world models. We are building anFPGA/GPU based heterogeneous computation systems as a superior alternative tocloud-based GPUs for big AI Model inference at edge and 5G RAN environments,taking advantage of low latency and high reliability of thenetwork. You will lead the hardware design, optimizing and acceleratinghigh-performance AI inference on FPGA-based platforms

【Key Responsibilities】

FPGA Development: Architect, optimize, and develop hardware acceleration designs for local inference of big AI models on AMD FPGA platforms. Perform synthesis, place-and-route, timing closure, and power analysis. Debug FPGA-related issues using built-in logic analysers with JTAG debuggers.
IP Development and Integration: Develop/optimize key IPs such as MIGs/PCIe/DMA cores/parallel computing entities at RTL, or from HLS. Create testbenches and verification environments for a full IP validation.
Integration & Validation: Support System-level integration, work alongside software engineers to transfer algorithms into FPGA hardware designs, using proper acceleration/ HDL languages. Perform end-to-end system-level testing, generate design description and testing documentations.

【Technical Requirements】

Hardware: 3 to 5 years of experience in VHDL/Verilog/SystemVerilog or HLS, especially in acceleration for parallel computation and/or neural networks. Expert in timing closure and resource optimization for large-scale FPGAs.
AI background: Understanding of architectures for Neural Networks such as CNNs/Transformers/Physical AI/World Models.
Experienced with deployment on embedded/edge Linux systems.
Tools: Mastery of Vivado/Vitis, and Python-based AI frameworks (PyTorch/TensorFlow).
Interface & Protocols: Proficiency in PCIe, 10/25/100G Ethernet, MIG and DMA cores.
Understanding of digital signal processing (DSP) fundamentals is a plus.

【Preferred Qualifications】

Direct experience with AMD accelerator cards for neural network acceleration applications.
GPU/CUDA experience or on-device inference for embedded AI.
Knowledge of HLS for parallel computation/neural networks.
Knowledge of Python domain-Specific Language for parallel computation/neural networks.

【What We Offer】

Opportunity to work on "World-First" AI-RAN integration projects for edge AI inference
Collaborative environment with top-tier AI researchers and Telecom experts.
Competitive salary and equity packages.

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