Design Verification Intern

Eligible Majors:
Master’s students in Microelectronics, Integrated Circuits, Electronic Engineering, Computer Science, Automation, or related disciplines.

Responsibilities

As a Design Verification Intern, you will work with the engineering team on the verification of digital IC designs. Your responsibilities will include:

1. Run simulation and regression tests, analyze failures, and assist in identifying root causes.
2. Maintain and extend functional coverage models and support coverage analysis and closure.
3. Build and enhance block-level verification environments under guidance, including stimulus generation, reference models, and automated checking.
4. Debug design and verification issues using simulation logs and waveform analysis.
5. Contribute to improvements in verification workflows, automation, and scripting tools.

Requirements

Essential

• Strong digital design fundamentals — able to read Verilog RTL, understand clocked logic, interpret simulation waveforms, and explain signal behavior around clock edges.
• Practical programming experience in at least one language such as C, C++, Python, or Java, preferably demonstrated through substantial coursework, research, internships, or personal projects.
• Comfort working in a Linux command-line environment, or the ability to become productive with Linux within the first two weeks of the internship.
• Strong analytical and problem-solving skills, with an interest in debugging complex hardware behavior.
• Able to commit to a minimum of 6 months.

Preferred Qualifications

The following experience is helpful:

• Experience with SystemVerilog and/or UVM, including university coursework or project experience.
• Hands-on experience with commercial EDA simulation tools or open-source tools such as Verilator and GTKWave.
• FPGA development experience or participation in IC design, FPGA, or hardware-related competitions.
• Familiarity with basic processor or hardware accelerator concepts such as pipelining, caches, memory interfaces, DMA, or bus protocols.
• Ability to write practical automation or data-processing scripts in Python.
• Open-source contributions, technical blogs, research projects, personal hardware projects, or other technical work that you can explain and discuss.

What You Will Gain

During the internship, you will gain practical exposure to the end-to-end digital design verification workflow, including simulation, debugging, functional coverage, verification environment development, and automation.

You will also have opportunities to work with real-world RTL designs and develop hands-on experience with the methodologies and tools commonly used in the semiconductor industry.