Sr. Test Engineer STE200924AQP

Designation : Sr. Test Engineer STE200924AQP_MCF_AI

Positions: 5

Salary Range: 5500 SGD ~ 7500 SGD

Job description

• Test program development for Digital, PMIC, RF & Mixed Signal products on ATE (primarily on Advantest 93k - SmarTest 7, SmarTest 8 / Teradyne UFLEX)
• Work closely with the design engineers on the first silicon debug, device characterization, test program bring up and production release activities
• Debug of digital vectors (JTAG/SCAN/ATPG / Functional / Mbist) and Device characterization across PVT (Process, Voltage and Temperature)
• Understanding and experience in characterization of Mixed Signal IP (ADC, DAC, PLL and etc.)
• Involve on test program hand off, production release, yield improvement and test time reduction
• High level of collaboration and interaction with different Product Engineering, Design Engineering, Quality Engineering, and Foundry Engineering teams.

Job Requirements:

• Graduates or Diploma/ Degree in Electronics / Electrical or Communication Engineering
• Minimum 5-8 years of working ATE knowledge on Advantest 93k or Uflex/Iflex Teradyne platform and experience in developing ATE SOC program from NPI stage to volume ramp stage
• Knowledge and hands on experience with statistical analysis software package and techniques, quality and reliability testing.
• Strong software skills (Java, C/C++, Visual Basic, Perl, Python etc.) for programming and debugging test codes
• Good Knowledge of analog and digital electronics is desired.
• Strong analytical and problem solving ability with desire to perform hands-on work within a lab environment is a must.
• Very strong verbal and written communication skills and able to work independently

Only Singaporeans/ SPR preferred

AI JD:

Company Overview

TESSOLVE ENGINEERING SERVICES PTE. LTD. is a technologycompany specializing in engineering services with expertise in semiconductortesting and product engineering solutions.

Job Summary

As a Senior Test Engineer, you will develop and debug testprograms for Digital, PMIC, RF, and Mixed Signal products on ATE platforms,collaborating with cross-functional teams to ensure successful productcharacterization, yield improvement, and production release.

Responsibilities

• Develop test programs for Digital, PMIC, RF, and Mixed Signal products on ATE platforms such as Advantest 93k (SmarTest 7, 8) and Teradyne UFLEX
• Collaborate with design engineers to debug first silicon, characterize devices, and bring up test programs from NPI to volume ramp stages
• Debug digital vectors including JTAG, SCAN, ATPG, Functional, and Mbist to support device characterization across process, voltage, and temperature variations
• Characterize Mixed Signal IP components such as ADC, DAC, and PLL to ensure product performance and reliability
• Lead test program handoff, production release, yield improvement, and test time reduction initiatives
• Engage with Product Engineering, Design Engineering, Quality Engineering, and Foundry Engineering teams to drive cross-functional alignment and problem resolution

Preferred competencies and qualifications

• Diploma or Degree in Electronics, Electrical, or Communication Engineering
• 5 to 8 years of experience with ATE platforms including Advantest 93k or Teradyne UFLEX/IFLEX, developing SOC test programs from NPI to volume ramp
• Proficiency in statistical analysis software and quality/reliability testing methodologies
• Strong programming skills in languages such as Java, C/C++, Visual Basic, Perl, and Python for test code development and debugging
• Solid understanding of analog and digital electronics principles
• Strong analytical and problem-solving skills demonstrated through hands-on lab work
• Excellent verbal and written communication skills with the ability to work independently