Senior Hardware / Software Design Engineer III with TS/SCI + Poly
Aperio Global · Fort Meade, MD ·
- Seniority
- Senior
- Employment
- Contract
- Category
- Hardware
- Salary
- USD 130,000 – 230,000 / year
Aperio Global · Fort Meade, MD ·
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Senior HW/SW Design Engineer developing FPGA-based DSP implementations and integrating them with Linux software stacks for RF communication and collection systems in support of national security missions.
Our Mission Statement
At Aperio Global, we bring together experts in cybersecurity, AI, data analytics, and cloud technologies to solve complex national security challenges. We focus on work where our expertise creates the greatest impact.
Our team includes technologists, Intelligence Community veterans, and security professionals who believe the best solutions come from collaboration, accountability, and technical excellence. From cyber operations and AI platforms to cloud-native software and emerging technologies, our work speaks for itself.
Come Solve With Us
We offer competitive pay, comprehensive benefits, retirement savings with company match, generous paid time off, and professional development. We invest in our people because great missions require great teams.
Aperio Global seeking an experienced senior HW/SW Design Engineer to join a small team to design, develop, construct, and test electronic hardware (FPGA) and software processing components for subsystems supporting RF communication and collection systems. This position requires expertise in FPGA development, digital signal processing implementation, and software-hardware integration to support mission critical requirements. The contractor will lead technical design efforts, implement DSP algorithms and associated technical components in FPGA hardware, integrate with existing Linux code bases, bridge FPGA to software stack connection, plus document those efforts. This role combines hardware design responsibilities (FPGA RTL development, timing closure, resource optimization) with software development (integration code, system-level software) to deliver complete subsystem solutions.
Mission Focus:
You will implement DSP and associated technical components in FPGA for code base integration.
Technical Proficiency: Strong experience required for FPGA coding, Digital Signal Processing theory & application, Interfacing FPGA code with existing code bases and software; Knowledge of signal processing blocks and related DSP components, Linux OS, coding ability in C and C++
Qualifications: Bachelor's degree plus 8-years of relevant experience or equivalent.
Security Clearance: Active TS/SCI with Polygraph required.
Nice to Have:
Additional experience with Vivado required; experience with Epiq Solution PDK preferred
Salary Range: Dependent on Level and Experience: 130k-230k
The salary range for this role represents Aperio’s good-faith estimate of compensation at the time of posting. Placement within the range is based on multiple factors, including but not limited to an individual’s qualifications, relevant experience, education, certifications, technical skills, contract labor categories and/or rates, work location, market conditions, and business needs.
At Aperio Global, we understand the value of investing in our most important asset—our employees. That's why we have crafted a comprehensive benefits package designed to help you make the best decision for yourself, your family and your lifestyle. For additional details, contact our talent acquisition team.
Aperio Global is an equal opportunity employer. We are committed to building an inclusive workforce where all employees and applicants are treated with respect and fairness. Employment decisions are based solely on qualifications, merit, and business needs — never on race, color, religion, sex, national origin, age, disability, genetic information, military or veteran status, pregnancy/childbirth, sexual orientation, gender identity, marital status, ethnicity, or any other characteristic protected by applicable federal, state, or local law.
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