Hardware - Senior SoC Design Engineer
FuriosaAI · Seoul, South Korea ·
- Seniority
- Senior
- Category
- Hardware
- Company size
- 11-50
Designs AI-native SoC architectures and RTL for high-performance, energy-efficient AI compute hardware, collaborating with verification, physical implementation, and silicon bring-up teams to ensure optimal performance and manufacturability.
About FuriosaAI
FuriosaAI builds high-performance, high-efficiency AI compute for the Inference Era. Founded in 2017 by veteran semiconductor and AI algorithm engineers, Furiosa operates globally with offices in Korea and Silicon Valley, along with a compiler-focused R&D lab in Lisbon.
Our vision is to make AI computing sustainable, enabling access to powerful AI for everyone on Earth. We solve the AI hardware energy and operational cost crisis at the architectural level, rather than through brute force, building the world's first truly AI-native compute platform to unlock the full potential of artificial intelligence for every enterprise.
Key Responsibilities
- SoC Architecture 및 Evaluation
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요구사항, 목표 성능, 시스템 사양에 대한 이해를 바탕으로 최적의 SoC Architecture를 결정합니다.
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- Micro-Architecture 및 RTL Design
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문서 형태로 Micro-Architecture를 정의하고 이를 바탕으로 RTL을 설계 합니다.
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- Subsystem or Block-Top Integration
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Top level integration 후 Timing closure, Lint check 및 Synthesis 를 수행하고 타 팀과 협력합니다.
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- Design Verification 팀과의 협업
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Design Verification 팀에게 검증 plan을 작성하여 전달하고 목표하는 coverage goal 달성을 위해 협력합니다.
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- Physical Implementation 팀과의 협업
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PnR에서 발생할 수 있는 Physical Implementation 이슈를 미리 판단하여 RTL Design에 반영할 수 있게 관련 팀과 협력합니다.
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- Silicon bring-up 팀과의 협업
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Silicon bring-up 및 system level verification에 참여하고 협력합니다.
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Minimum Qualifications
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전자공학과, 컴퓨터공학 관련 학과 전공자
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7년 이상의 RTL 설계 경력을 가진 학사 학위 소지자 혹은 5년 이상의 RTL 설계 경력을 가진 석사 학위 소지자
Preferred Qualifications
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SoC System IP 설계 경력
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다양한 IP를 System / Chiptop level 설계, integration 실무 경험
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Subsystem Top 설계 경력
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Data Center 향 혹은 Large-Scale SoC 설계 경력
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FPGA Porting 경력
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AMBA Bus Protocol 및 여러 Bus Interface 대한 높은 이해도
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Clock Domain Crossing에 대한 높은 이해도
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Design Automation 및 Scripting 을 통한 design flow 개선 경험
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Verification, Synthesis, Power Estimation Tool과 같이 다양한 EDA tool 사용 경험
Why Join FuriosaAI
The defining bottleneck of the AI era is building the right hardware and software stack to run it at global scale. Furiosa is solving this challenge holistically from the ground up.
With our flagship chip, RNGD, in mass production today and our next-generation platform in development with Broadcom, we are proving that full-stack, tensor-native compute is the future of AI infrastructure. This is a pivotal moment to join our team, right as we accelerate our global expansion.
At Furiosa, you will:
Solve AI’s Most Urgent Challenge. Help build the high-performance, energy-efficient inference hardware and software required to fulfill the promise of advanced AI.
Pioneer Full-Stack Co-Design. Work with teams that are architecting solutions from silicon up through the compiler (featuring innovations like Tensor Contraction Language and Virtual ISA) and serving frameworks.
Ship Real-World Silicon, Software, and Solutions. Turn breakthrough technology into commercial deployment. RNGD is in mass production with TSMC and running live enterprise workloads for global leaders like LG AI Research and Samsung SDS.
Partner With the Industry's Best. Collaborate across an elite global ecosystem that includes TSMC, Broadcom, SK Hynix, and GUC.
Do Your Life’s Best Work. Join a brilliant, low-ego, mission-driven team in a high-trust environment that values autonomy, intellectual curiosity, and shared ambition.
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